The State of RISC-V Instruction Set Architecture in China

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The State of RISC-V Instruction Set Architecture in China

Credit: Visual China

RISC-V refers to the fifth generation of Reduced Instruction Set Computer, which is provided under royalty-free open-source licenses.

“Today, open-source software has become the mainstream of software development. We believe that open-source RISC-V will also achieve similar success in the hardware field. China is willing to embrace open source and collaborate with the world to build a strong and prosperous RISC-V ecosystem,” Ni said.

In fact, as China and the United States continue to decouple from each other in the chip industry amid mounting deglobalization, China is accelerating its embrace of open-source RISC-V development to avoid being constrained by mainstream CPU chip architectures.

As China is denied access to advanced chip products in the United States and its allies, how is the progress of domestic open-source RISC-V architecture?

RISC-V shipments expected to exceed 80 billion units by 2025

RISC-V is an open-source reduced instruction processor, which originated from the research of Professor Krste Asanovic and Professor David Patterson at the University of California, Berkeley.

In fact, the widely used instruction set architectures ARM and RISC-V both originated from the RISC (Reduced Instruction Set Computer) in the 1980s. Unlike RISC-V, ARM is a closed instruction set architecture, and manufacturers using ARM can only adjust product frequency and power consumption according to their own needs without changing the original design.

While x86 and ARM have authorization restrictions, RISC-V is characterized by simplicity and open source. RISC-V can develop unique chips that better suit specific needs and break the conventions of high licensing fees and difficulties in customization when x86 and ARM are used.

After decades of evolution, CPU architectures have become extremely complex and cumbersome. Documents of ARM architecture are thousands of pages long, with complex and numerous instructions that are not compatible with each other and do not support modularity. There are also issues of expensive patent and architecture licensing . In contrast, RISC-V was designed from the beginning as a completely open source architecture. At the same time, its modularity

feature allows users to customize different instruction subsets according to their needs, which has attracted wide attention from the industry.

Data shows that by 2022, the cumulative shipment of RISC-V chips worldwide reached 10 billion.

According to Counterpoint Research’s prediction, by 2025, the cumulative shipment of RISC-V processors will exceed 80 billion units, with a compound annual growth rate (CAGR) of 114.9%. By then, RISC-V will account for 14% of the global CPU market, 28% of the IoT market, 12% of the industrial market, and 10% of the automotive market.

As the world’s largest semiconductor market, China has long embraced RISC-V technology.

Calista Redmond, the CEO of the RISC-V International Foundation, said in a keynote speech on Thursday that China is one of the most important leading forces in the RISC-V International Foundation community. Currently, more than 700 Chinese chip-related companies have raised $19 billion in 2022, and the Chinese chip design market is expected to account for nearly a quarter of the global market by 2030.

According to public data, from 2021 to 2027, China’s RISC-V cores are expected to account for approximately half of global shipments.

At this year’s RISC-V Summit China, many chip design companies, including T-Head of Alibaba and Sophgo, released new products.

Among them, Beijing Open Source Chip (BOSC) announced the second generation “XiangShan”, an open-source high-performance RISC-V processor core , which has surpassed ARM A76 in performance; Ali T-Head released the first self-developed RISC-V AI platform, improving performance by more than 80% compared to classical solutions, supporting the operation of more than 170 mainstream AI models, and will also release a combination with technologies such as Android and WebOS in the second half of the year to promote the application of high-performance RISC-V chips. Sophgo disclosed the server cluster of RISC-V CPU SG2042. And Deepin AI released DC ROMA, the world’s first native RISC-V-developed laptop.

Currently, domestic RISC-V companies can be roughly divided into two groups: one is to sell IP cores using the RISC-V, such as SiFive, and the other is to design, tape out, mass produce, and sell chip products based on the RISC-V. Some will also use other companies’ RISC-V IP cores to mass produce chips, such as T-Head of Alibaba, Nuclei System Technology, and Sophgo.

Bao Yungang, the chief scientist of BOSC, told the TiPost App that with the increasing demand for AI computing power and large-scale model data migration, RISC-V can play a significant role in them. By using RISC-V-based high-performance processor IP, computational efficiency can be improved. He also believes that the openness of RISC-V can bring more opportunities for innovation, especially in the future application scenarios.

“ARM gained in popularity in the mobile phone market, and we see that AI can combine with the RISC-V, which features flexibility and scalability. We can combine it with DSA and faster computing power. If we can fully apply these capabilities to AI, and further expand the CPU’s capabilities, RISC-V can be applied in the field of AI,” said Yang Jing, the vice president of T-Head.I She added that in addition to improving computational power, RISC-V also needs to enhance AI capabilities.

According to research firm Semico, the number of RISC-V chips is expected to grow by a CAGR of 73.6% from 2023 to 2027, producing approximately 25 billion AI chips based on the RISC-V, with revenues reaching $291 billion.

Regarding the progress of the “domestic open-source RISC-V”– “Xiangshan” project, Bao revealed to TiPost App that the second-generation “Nanhu” architecture has completed “productization transformation”. Now, a batch of companies have started using “Xiangshan” to develop high-performance chip products. In 2022, two companies have applied “Xiangshan-Nanhu”. One of them has taped out the chips and will receive samples in September this year, and another will tape out in the second half of this year. The third-generation “Kunminghu” architecture is under development, and its performance can be comparable to ARM Neoverse N2. Compared with the ARM, the “Xiangshan-Kunminghu” architecture has the advantage of open-source.

“Now it seems that the third-generation ‘Xiangshan-Kunminghu’ has a chance to reach the level of high-performance processor cores of ARM two or three years ago, but it is only in terms of performance. Its area and power consumption, where ARM has a strong advantage, still need to be optimized, and we will work on these aspects. Our advantage lies in adopting an open-source approach.” Bao said that more companies are using the “Nanhu” architecture this year, and there may be some RISC-V GPU chip products in the future.

Bao emphasized that “Xiangshan” is gaining momentum in its development.

Software ecosystem and business models need to be improved

Wu Yanjun, deputy director of the Institute of Software Chinese Academy of Sciences (ISCAS), said that in recent years, the RISC-V ecosystem has developed rapidly, and related products have gradually been produced, even applied in the data center servers, tablets, and PC notebooks. Moreover, RISC-V can play a greater role in the AI ecosystem. In the future, each company’s AI processors will have their own characteristics and can form different extension instruction sets or custom instruction sets, making the RISC-V ecosystem more diverse.

Bao pointed out that there are five main commercial opportunities for RISC-V at present:

  • First, there is an opportunity to replicate the ARM model to establish a RISC-V IP company and provide self-developed IP cores or Chiplets;
  • Second, in the high-value high-performance RISC-V field, self-developed processor cores, chiplets, and SoCs can be used to save expensive licensing fees and enable customization and expansion;
  • Third, for a specific large-scale application scenario, self-developed or based on open-source RISC-V processor cores can be used to develop dedicated chips;
  • Fourth, to create a platform-type company based on the TI (Texas Instruments) model to provide “one-stop chip design services” for small and medium-sized users, meeting the needs of thousands of customized chip demands for IoT scenarios worth tens of billions of dollars;
  • Fifth, to replicate the business model in the open-source software field, and provide IP products and design services for downstream SoC chip design companies based on open-source RISC-V implementations (such as Xiangshan).

Bao believes that the first three models are relatively traditional and are easily recognized as a model for growth in the industry. Currently, most startup companies focus on these three models, while the last two models are more innovative and waiting to be explored, with great opportunities for technological change.

Bao predicts that in the future, there may be chip development based on cloud services. In such a model, various resources can be shared in the cloud. For developers, as long as they register a cloud account, they can complete various chip developments in the cloud. Globally, there are already some prototypes moving in this direction, such as Silicon Valley company efabless, which allows users to quickly generate an SoC chip by simply dragging and dropping on its platform.

However, due to the relatively new RISC-V and the immature software ecosystem, there are few application cases. There are also apparent performance and processing capability limitations in complex environments such as accelerated computing. Especially, the performance of RISC-V chips is highly dependent on the manufacturing process, and if less advanced 14nm or 28nm processes are used, their performance may be affected.

The open-source nature of RISC-V means that its technical details are public, and modifications are also public. Previously, as NVIDIA’s acquisition of Arm progressed, the “neutral status” of Arm’s chip in this field was questioned, and companies turned their attention to RISC-V. However, when developing chips, companies often directly modify the RISC-V rather than using products from other companies, resulting in a highly fragmented industry and difficulties in compatibility in application ecosystems.

Wu said that at the current stage, there is still some gap between RISC-V and the x86 and ARM ecosystems, whether it is in terms of software scale or performance optimization.. “This is actually what we need to do in the next few years.”

The State of RISC-V Instruction Set Architecture in China

Regarding the impact of process technology, Bao believes that in the short term, advanced process limitations will definitely affect the design of high-performance chips. In the past, TSMC and Arm prepared “fast food” for many domestic chip companies, and everyone could quickly design chips by directly “eating fast food”, without putting much effort into real research and development. Now, under the constraints of advanced processes, it is more important to better combine architecture and process, and using advanced technologies such as chiplets to package 14nm/28nm chips can also solve the problem of advanced processes.

“In general, everyone needs to abandon the traditional mindset of ‘eating fast food’,” Bao said to the TiPost App.

Wu told the TiPost App that the application scenarios of chips are very broad, especially in China. And there are several scenarios of leading applications that require support from advanced processes, while most applications do not have such high process requirements. Moreover, advanced process technology does not necessarily mean that the performance of the final system is leading. In many cases, software and other technologies can offset the disadvantages brought about by the process.

On August 4th, the top five automotive electronic chip companies, namely Bosch, Qualcomm, Infineon, Nordic Semiconductor, and NXP, jointly announced that they will invest in a joint venture company in Germany based on the open-source RISC-V to promote the application of the RISC-V, with the initial focus on the automotive field. This has caused widespread attention because Qualcomm and Infineon are still customers of Arm but are continuously betting on the RISC-V, which is enough to show the RISC-V ‘s impact in the industry.

As RISC-V products accelerate their application in areas such as laptops and servers, their competitor Arm, which has shipped 250 billion chips, has felt the pressure. In the IPO prospectus submitted by Arm on Monday, it stated that its customers are establishing joint ventures with competitors to accelerate the adoption of RISC-V.

“Such as the recently announced RISC-V joint venture. This type of cooperative relationship or merger may enable competitors to predict or respond to new or changing opportunities, technologies, standards, or customer requirements faster and more effectively than us. If we cannot predict or respond to these competitive challenges, our competitiveness may be weakened, and our revenue and profitability may decline.” Arm stated in the prospectus.

Independent chip analyst Stewart Randall believes that Arm should pay attention to the rise of these open-source architectures such as RISC-V, as this is the real challenge they will face in the future.

(This article was first published on the TiPost App, Author: Lin Zhijia, Editor: Ma Jinnan)

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